Tag Archives: Interrupts

Control Bus

Well we have looked at the uses of the data and address buses, but as some of you have noticed I have not talked about the control bus. For those that were at the open days it might be worth while looking through the blog at older entries.

The control bus is different from the other two buses in being a group of discrete wires with separate functions.

  • Read – signals a memory read operation is to take place
  • Write – signals a memory write operation is to take place
  • Clock – synchronises the signals being passed in and out of the processor
  • Reset – clears all registers and buses of data
  • Interrupt – tells the processor to save current process, run interrupt process until completed, then resume its activities (can be ignored)
  • Non Maskable Interrupt (NMI) – tells the processor to save current process, run interrupt process until completed, then resume its activities (cannot be ignored)

So as you can see these functions are all separate but are controls and are therefore grouped into the control bus.

Buses and Addressability

Today’s lesson was more a revision of topics that went before. However, we did learn a few important things.

  • To get the processors attention peripherals can make use of
    • Polling its a little like the teacher not letting anyone talk and asking everyone in turn if they need help
    • Interrupts this is like someone putting up their hand and the teacher stopping to deal with their problem before continuing.
  • The word size of the computer is the number of bits that can be manipulated as a single unit by the processor.
    • An ideal computer has a data bus that is the same size as its memory locations
  • The address bus determines the number of memory locations, however the data bus determines the size of each location. So to work out the amount of addressable memory, we must multiply the number of addresses by their size.
    • Total Addressable Memory = (2^address bus width) * Data bus width
    • IE a machine with a 16 bit Data Bus and 32 bit address bus would have
    • (2^32)*16 bits of accessible storage
    • or 8GB – Do the math yourself to prove it.