Tag Archives: Data Bus

1. Computer Systems, Homework, Revision

Quick teaser

I lifed this from the 2011 paper it’s question 13

(b) The computer has a maximum addressable memory of 16 Gigabytes. Its address bus width is 32.
(i) Calculate the width of the data bus.
(ii) State why computers do not come with the maximum addressable memory installed.
(iii) State the effect that adding one new line to the address bus would have on the maximum addressable memory.

I thought it was a very good question. I will post the solution to it tomorrow, feel free to comment with your answer but I don’t want you to copy and paste it from the Marking Instructions above.

1. Computer Systems, Computing Higher

Buses and Addressability

Today’s lesson was more a revision of topics that went before. However, we did learn a few important things.

  • To get the processors attention peripherals can make use of
    • Polling its a little like the teacher not letting anyone talk and asking everyone in turn if they need help
    • Interrupts this is like someone putting up their hand and the teacher stopping to deal with their problem before continuing.
  • The word size of the computer is the number of bits that can be manipulated as a single unit by the processor.
    • An ideal computer has a data bus that is the same size as its memory locations
  • The address bus determines the number of memory locations, however the data bus determines the size of each location. So to work out the amount of addressable memory, we must multiply the number of addresses by their size.
    • Total Addressable Memory = (2^address bus width) * Data bus width
    • IE a machine with a 16 bit Data Bus and 32 bit address bus would have
    • (2^32)*16 bits of accessible storage
    • or 8GB – Do the math yourself to prove it.