Tag Archives: Fetch Execute Cycle

Fetch Execute Cycle

I was asked for more detail about the fetch execute cycle. So I thought I would look for something new and a simpler way to explain it.  So if you have a look at this BBC page,  you should get a basic overview of what is happening. You can then read what I found on this page, this will help you to understand it a little better.

Then you can read my blog post about it, which also includes a link to an animation.

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The Fetch Execute Cycle

The Fetch Execute cycle (Memory read instruction)

  1. The memory address of the next instruction is placed on the address bus
  2. A read signal is activated on the read line
  3. The data stored at the memory address is placed on the data bus
  4. The processor interprets the instruction
  5. The processor executes the instruction

The Fetch Execute cycle (Memory write instruction)

  1. The required memory address is put in the Memory Address Register
  2. The value to be written is put into the Memory Data Register
  3. The control unit activates the Write Line.
  4. The contents of the Memory Data Register are transferred by the data bus to the required memory address.